Wednesday, 21 August 2013

Re: [Rpcemu] 0.8.10/5.20: MIPS readout oddity

On Tue, Aug 20, 2013 at 05:09:40PM +0100, George wrote:
> I've been running 0.8.10/5.20 daily for about a week now, and have
> noticed an oddity relating to the MIPS readout on the header bar,
> which seems to display activity (sometimes /a lot/ of activity - up to
> 1400 on one occasion(!) and generally around 250-350 on my system*)
> regardless of whether any application is active (i.e., when TaskUsage
> will be displaying '0' or low single-figure activity levels).

RISC OS machine by default don't have any power-saving (with reduce
cpu-usage off), they run flat out providing wimp null events even when
there's no apps running anything. This busy-wait loop uses up CPU cycles,
which are the MIPS you're seeing.

> I haven't noticed this with any previous 5.xx version or 4.02, where in
> both cases the MIPS display conformed pretty closely to activity as
> perceived on the desktop.

No, (assuming reduce-cpu-usage is off) all the versions of the OS will run
flat out.

The mips count can also vary depending on the complexity or ease with which an
instruction can be emulated. A tight loops of instructions that are easy
can temporarily skew the MIPS count higher.

> Selecting Settings-Reduce CPU Usage doesn't
> seem to affect the behaviour.

However, this should have kicked in the power-saving stuff. *provided*
that the OS starts seeing enough null events, e.g. if you're running a
task that uses all spare cpu in risc os, this will have no effect.

After about 10 seconds you should see the mips count start to drop ...
unless something has changed in RO 5.20 from earlier ...

> Windows Task Manager gives the same readout as MIPS.

I think windows task manager just takes a copy of the window title string.

You can use task manager to see that until you engage 'reduce CPU usage'
RPCEmu will use all available CPU power on one core, but with reduce CPU
usage that should drop to a negligable level.

TBH, as with most benchmarks, interpretting the output of the MIPS count
is complicated :(

Peter

--
Peter Howkins
peter.howkins@marutan.net

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