[gccsdk] Hardware Bitcount

In message <20120828133922.GV22482@chiark.greenend.org.uk> you wrote:

> [Hope you don't mind me keeping this on the mailing list]

No, but this reply only came on email, not the gccsdk list. I'll
try ccing to the list for you.

> Looking it up, it appears x86 has CLZ (count leading zeros) and CTZ (count
> trailing zeros) [1]. ARM has CLZ but not CTZ. If you google 'ctz arm'
> there's a variety of ways of doing this. But you need to be careful what
> version ARM you're running them on, as they don't exist on earlier CPUs. So
> I suspect GCC will use it if you set the ARM arch number high enough.
> http://gcc.gnu.org/ml/gcc-patches/2009-07/msg00467.html
>
> [1] not necessarily called that:
> http://en.wikipedia.org/wiki/Find_first_set
>
> Theo

Thanks, I'll look into it. Curious how the code is compiling and
running without errors though.

I quoted the 64 bit section of code previously.
I have wiped out the unused sections now for clarity.

# define U32 uint32_t
# define S32 int32_t

static inline int LZ4_NbCommonBytes (register U32 val)
{
return (__builtin_ctz(val) >> 3);
// #else
// static const int DeBruijnBytePos[32] = { 0, 0, 3, 0, 3, 1, 3, 0, 3, 2, 2, 1, 3, 2, 0, 1, 3, 3, 1, 2, 2, 2, 2, 0, 3, 1, 2, 0, 1, 0, 1, 1 };
// return DeBruijnBytePos[((U32)((val & -(S32)val) * 0x077CB531U)) >> 27];
}

Thanks, Ron




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