===================================================================
--- gcc4/recipe/files/gcc/libunixlib/signal/_signal.s (revision 6866)
+++ gcc4/recipe/files/gcc/libunixlib/signal/_signal.s (working copy)
@@ -350,7 +350,7 @@
@ 0x80000100 - &800001FF CoProcessor exceptions
@ 0x80000200 - &800002FF Floating Point exceptions
@ 0x80000300 - &800003FF Econet exceptions
-@ 0x80000500 - &800005FF VFP exceptions
+@ 0x80000600 - &800006FF VFP exceptions
@
@ For these classes of exceptions, we map Floating Point & VFP exceptions
@ to SIGFPE and all others to SIGEMT.
@@ -444,7 +444,7 @@
MOV a3, a3, LSR #8
AND a3, a3, #0xFF
# if defined(__VFP_FP__)
- CMP a3, #0x05
+ CMP a3, #0x06
# else
CMP a3, #0x02
# endif
Index: gcc4/recipe/patches/gcc/libcpp.configure.ac.p
===================================================================
--- gcc4/recipe/patches/gcc/libcpp.configure.ac.p (revision 0)
+++ gcc4/recipe/patches/gcc/libcpp.configure.ac.p (revision 0)
@@ -0,0 +1,12 @@
+Index: libcpp/configure.ac
+===================================================================
+--- libcpp/configure.ac (revision 221801)
++++ libcpp/configure.ac (working copy)
+@@ -150,6 +150,7 @@
+ case $target in
+ alpha*-*-* | \
+ arm*-*-*eabi* | \
++ arm*-*-riscos | \
+ arm*-*-rtems[.0-9]* | \
+ arm*-*-symbianelf* | \
+ x86_64-*-* | \
Index: gcc4/recipe/patches/gcc/gcc.config.arm.arm.c.p
===================================================================
--- gcc4/recipe/patches/gcc/gcc.config.arm.arm.c.p (revision 6866)
+++ gcc4/recipe/patches/gcc/gcc.config.arm.arm.c.p (working copy)
@@ -381,22 +381,6 @@
if (TARGET_VXWORKS_RTP)
{
pic_rtx = gen_rtx_SYMBOL_REF (Pmode, VXWORKS_GOTT_BASE);
-@@ -9024,6 +9239,15 @@
- if (immtype == -1)
- return -1;
-
-+#ifdef TARGET_RISCOSELF
-+ /* FIXME: GCCSDK: Find a better fix for this if possible
-+ (see "Broken on 32-bit H_W_I hosts" FIXME below)
-+ GCC team have no plans to fix the issue:
-+ https://gcc.gnu.org/bugzilla/show_bug.cgi?id=45511 */
-+ if ((sizeof (HOST_WIDE_INT) != 8) && (immtype == 17))
-+ return -1;
-+#endif
-+
- if (elementwidth)
- *elementwidth = elsize;
-
@@ -15072,7 +15296,7 @@
compromise save just the frame pointers. Combined with the link
register saved elsewhere this should be sufficient to get
Index: gcc4/recipe/patches/gcc/gcc.config.gcc.p
===================================================================
--- gcc4/recipe/patches/gcc/gcc.config.gcc.p (revision 6866)
+++ gcc4/recipe/patches/gcc/gcc.config.gcc.p (working copy)
@@ -1,8 +1,8 @@
Index: gcc/config.gcc
===================================================================
---- gcc/config.gcc (revision 196619)
+--- gcc/config.gcc (revision 221801)
+++ gcc/config.gcc (working copy)
-@@ -930,6 +930,18 @@
+@@ -930,6 +930,19 @@
esac
tm_file="${tm_file} arm/aout.h arm/arm.h"
;;
@@ -17,6 +17,7 @@
+ extra_options="${extra_options} arm/riscos.opt"
+ extra_objs="riscos.o"
+ extra_gcc_objs="riscos-gcc.o"
++ need_64bit_hwint=yes
+ ;;
arm*-*-elf)
tm_file="dbxelf.h elfos.h newlib-stdint.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h"
Index: gcc4/recipe/scripts/gcc/reconf-libcpp
===================================================================
--- gcc4/recipe/scripts/gcc/reconf-libcpp (revision 0)
+++ gcc4/recipe/scripts/gcc/reconf-libcpp (revision 0)
@@ -0,0 +1,5 @@
+#!/bin/bash -e
+# Auto-generate 'libcpp' as we've patched it.
+# Copyright (c) 2010-2015 GCCSDK Developers
+
+( cd libcpp && ACLOCAL='aclocal -I .. -I ../config' autoreconf -v )
Property changes on: gcc4/recipe/scripts/gcc/reconf-libcpp
___________________________________________________________________
Added: svn:executable
+ *
Hi,
Attached is a new patch with a couple of VFP related changes:
* Corrected the VFP exception error base to match the value that's now
being used by RISC OS (it was recently modified in the OS to avoid a
potential clash with one of ROL's allocations, as I'd mentioned might
happen in my original mail)
* Removed the hacky fix for the internal compiler error in
gcc/config/arm.c and instead make GCC use a 64bit HOST_WIDE_INT when
targetting RISC OS. Forcing 64bit HOST_wIDE_INT, even on 32bit hosts, is
the behaviour that the major ARM targets seem to take. The GCC binaries
will be bigger, and compiler memory usage will presumably increase too,
but the change doesn't seem to have had any measurable impact on compile
times (compiling some non-trivial C code on an Iyonix with -O3 took almost
exactly 10 minutes for both 32bit and 64bit HOST_WIDE_INT versions)
Cheers,
- Jeffrey
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