Re: [gccsdk] Makefile syntax

On 07/10/2015 18:20, Gavin Wraith wrote:
> The crunch line is
>> TARGET_TESTARCH=$(shell $(TARGET_CC) $(TARGET_TCFLAGS) -E lj_arch.h -dM)
> followed by what is in effect a switch statement. The relevant branch,
> apparently not taken is
>> ifneq (,$(findstring LJ_TARGET_ARM ,$(TARGET_TESTARCH)))
>> TARGET_LJARCH= arm
> Should GCCSDK's GCC 4.7.4 cope with this?
>

Any recent port of GNU 'make' should cope with that syntax. However, the
current GCCSDK port (version 3.81), is 9 years old, so this is a
potential problem.

However, I suspect the problem here is with 'shell', and that 'make' is
not getting the output from the shell command. So $TARGET_TESTARCH will
be an empty string, which explains why $TARGET_LJARCH is not getting
set. On my private port of GNU 'make' I've changed 'make' to use vfork()
rather than fork() to work around this particular problem. That
particular change is not in my online version (which is also quite old),
so I'll email you my latest version privately to try out. This is the
latest version 4.1 - it has some other changes too to make things easier
on RISC OS (in particular you don't need to quote out $ in pathnames).

Duncan

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