diff -r 7e56f1c02af8 -r 63c934191538 src/iomd.c
--- a/src/iomd.c Thu Oct 28 16:38:15 2021 +0100
+++ b/src/iomd.c Thu Dec 29 23:42:50 2022 +0000
@@ -225,6 +225,35 @@
}
}
+static uint32_t old_timer_ticks;
+
+static void updatetimers(uint64_t nsec_timer)
+{
+ uint32_t new_timer_ticks = (uint32_t) (nsec_timer/500); /* Number of timer ticks since timer epoch */
+ int32_t ticks = new_timer_ticks - old_timer_ticks;
+ if (ticks <= 0)
+ {
+ return;
+ }
+ old_timer_ticks = new_timer_ticks;
+
+ iomd.t0.counter -= ticks;
+ while (iomd.t0.counter < 0 && iomd.t0.in_latch)
+ {
+ iomd.t0.counter += iomd.t0.in_latch;
+ iomd.irqa.status |= IOMD_IRQA_TIMER_0;
+ updateirqs();
+ }
+
+ iomd.t1.counter -= ticks;
+ while (iomd.t1.counter < 0 && iomd.t1.in_latch)
+ {
+ iomd.t1.counter += iomd.t1.in_latch;
+ iomd.irqa.status |= IOMD_IRQA_TIMER_1;
+ updateirqs();
+ }
+}
+
/**
* Handle the regularly ticking interrupts, the two
* IOMD timers, the sound interrupt and podule
@@ -232,23 +261,9 @@
*
* Called (theoretically) 500 times a second IMPROVE.
*/
-void gentimerirq(void)
+void gentimerirq(uint64_t nsec_timer)
{
- iomd.t0.counter -= 4000; /* 4000 * 500Hz = 2MHz (the IO clock speed) */
- while (iomd.t0.counter < 0 && iomd.t0.in_latch)
- {
- iomd.t0.counter += iomd.t0.in_latch;
- iomd.irqa.status |= IOMD_IRQA_TIMER_0;
- updateirqs();
- }
-
- iomd.t1.counter -= 4000;
- while (iomd.t1.counter < 0 && iomd.t1.in_latch)
- {
- iomd.t1.counter += iomd.t1.in_latch;
- iomd.irqa.status |= IOMD_IRQA_TIMER_1;
- updateirqs();
- }
+ updatetimers(nsec_timer);
if (soundinited && sndon)
{
@@ -274,8 +289,6 @@
void
iomd_write(uint32_t addr, uint32_t val)
{
- static int readinc = 0;
-
uint32_t reg;
if (iomd_type == IOMDType_IOMD2) {
@@ -353,17 +366,12 @@
iomd.t0.in_latch = (iomd.t0.in_latch & 0xff) | ((val & 0xff) << 8);
break;
case IOMD_0x048_T0GO: /* Timer 0 Go command */
+ updatetimers(rpcemu_nsec_timer_ticks());
iomd.t0.counter = iomd.t0.in_latch - 1;
break;
case IOMD_0x04C_T0LAT: /* Timer 0 Latch command */
- readinc ^= 1;
+ updatetimers(rpcemu_nsec_timer_ticks());
iomd.t0.out_latch = iomd.t0.counter;
- if (readinc) {
- iomd.t0.counter--;
- if (iomd.t0.counter < 0) {
- iomd.t0.counter += iomd.t0.in_latch;
- }
- }
break;
case IOMD_0x050_T1LOW: /* Timer 1 low bits */
@@ -373,17 +381,12 @@
iomd.t1.in_latch = (iomd.t1.in_latch & 0xff) | ((val & 0xff) << 8);
break;
case IOMD_0x058_T1GO: /* Timer 1 Go command */
+ updatetimers(rpcemu_nsec_timer_ticks());
iomd.t1.counter = iomd.t1.in_latch - 1;
break;
case IOMD_0x05C_T1LAT: /* Timer 1 Latch command */
- readinc ^= 1;
+ updatetimers(rpcemu_nsec_timer_ticks());
iomd.t1.out_latch = iomd.t1.counter;
- if (readinc) {
- iomd.t1.counter--;
- if (iomd.t1.counter < 0) {
- iomd.t1.counter += iomd.t1.in_latch;
- }
- }
break;
case IOMD_0x068_IRQMSKC: /* IRQC mask (ARM7500/FE) */
@@ -913,6 +916,7 @@
iomd.t1.counter = 0xffff;
iomd.t0.in_latch = 0xffff;
iomd.t1.in_latch = 0xffff;
+ old_timer_ticks = (uint32_t) (rpcemu_nsec_timer_ticks()/500);
if (iomd_type == IOMDType_ARM7500 || iomd_type == IOMDType_ARM7500FE) {
/* ARM7500/ARM7500FE only */
@@ -933,7 +937,6 @@
cinit = 0;
sndon = 0;
flyback = 0;
-
}
/**
diff -r 7e56f1c02af8 -r 63c934191538 src/iomd.h
--- a/src/iomd.h Thu Oct 28 16:38:15 2021 +0100
+++ b/src/iomd.h Thu Dec 29 23:42:50 2022 +0000
@@ -146,7 +146,7 @@
extern uint32_t iomd_mouse_buttons_read(void);
extern void iomd_flyback(int flyback_new);
-extern void gentimerirq(void);
+extern void gentimerirq(uint64_t nsec_timer);
#ifdef __cplusplus
} /* extern "C" */
diff -r 7e56f1c02af8 -r 63c934191538 src/qt5/rpc-qt5.cpp
--- a/src/qt5/rpc-qt5.cpp Thu Oct 28 16:38:15 2021 +0100
+++ b/src/qt5/rpc-qt5.cpp Thu Dec 29 23:42:50 2022 +0000
@@ -414,6 +414,15 @@
emulator->idle_process_events();
}
+/**
+ * Helper function to allow reading of the nanosecond timer
+ */
+uint64_t
+rpcemu_nsec_timer_ticks(void)
+{
+ return emulator->elapsed_timer.nsecsElapsed();
+}
+
} // extern "C"
/**
@@ -524,6 +533,8 @@
connect(this, &Emulator::nat_rule_add_signal, this, &Emulator::nat_rule_add);
connect(this, &Emulator::nat_rule_edit_signal, this, &Emulator::nat_rule_edit);
connect(this, &Emulator::nat_rule_remove_signal, this, &Emulator::nat_rule_remove);
+
+ elapsed_timer.start();
}
/**
@@ -538,8 +549,6 @@
iomd_timer_next = (qint64) iomd_timer_interval; // Time after which the IOMD timer should trigger
video_timer_next = (qint64) video_timer_interval;
- elapsed_timer.start();
-
unsigned network_nat_rate = 0;
while (!quited) {
@@ -562,7 +571,7 @@
// If we have passed the time the IOMD timer event should occur, trigger it
if (elapsed >= iomd_timer_next) {
iomd_timer_count.fetchAndAddRelease(1);
- gentimerirq();
+ gentimerirq(elapsed);
iomd_timer_next += (qint64) iomd_timer_interval;
}
@@ -611,7 +620,7 @@
// If we have passed the time the IOMD timer event should occur, trigger it
if (elapsed >= iomd_timer_next) {
iomd_timer_count.fetchAndAddRelease(1);
- gentimerirq();
+ gentimerirq(elapsed);
iomd_timer_next += (qint64) iomd_timer_interval;
}
diff -r 7e56f1c02af8 -r 63c934191538 src/qt5/rpc-qt5.h
--- a/src/qt5/rpc-qt5.h Thu Oct 28 16:38:15 2021 +0100
+++ b/src/qt5/rpc-qt5.h Thu Dec 29 23:42:50 2022 +0000
@@ -43,6 +43,8 @@
void idle_process_events();
+ QElapsedTimer elapsed_timer;
+
signals:
void finished();
@@ -116,7 +118,6 @@
void nat_rule_remove(PortForwardRule rule);
private:
- QElapsedTimer elapsed_timer;
int32_t video_timer_interval; ///< Interval between video timer events (in nanoseconds)
qint64 iomd_timer_next; ///< Time after which the IOMD timer should trigger
qint64 video_timer_next; ///< Time after which the video timer should trigger
diff -r 7e56f1c02af8 -r 63c934191538 src/rpcemu.h
--- a/src/rpcemu.h Thu Oct 28 16:38:15 2021 +0100
+++ b/src/rpcemu.h Thu Dec 29 23:42:50 2022 +0000
@@ -231,6 +231,7 @@
extern void rpcemu_move_host_mouse(uint16_t x, uint16_t y);
extern void rpcemu_idle_process_events(void);
extern void rpcemu_send_nat_rule_to_gui(PortForwardRule rule);
+extern uint64_t rpcemu_nsec_timer_ticks(void);
extern int drawscre;
extern int quited;
Hi,
While working on some potential changes to the way RISC OS 5 uses the IOMD
timers, I spotted a couple of problems with the way RPCEmu emulates the
timers:
1. Reading from a timer can cause that timer to increment, causing it to
(a) go out of sync with the other timer, and (b) run much faster than real
time if you read from it in a loop
2. Under normal use, timers only increment in chunks of 4000 ticks,
limiting their usefulness (e.g. when latching & reading the counter to
time short sections of code or create a delay loop)
This patch should fix those two issues, by having the code get the current
time (from the QElapsedTimer) and process any pending ticks for both
timers whenever either of their GO or LAT registers are written.
gentimerirq() has also been updated so that it will use the QElapsedTimer
to work out how many ticks to apply instead of always applying 4000 ticks.
Obviously there are still improvements that could be made (e.g. more
precise timing of interrupts, synchronisation with other clocks in the
system), but this feels like a good step in the right direction. It's
enough to keep my code happy, and passes my quick "does it boot to
desktop" smoke test on various RISC OS 3.5 - 6 ROMs.
Let me know what you think!
Cheers,
- Jeffrey
Friday, 30 December 2022
Friday, 9 December 2022
Nitter back online
Nitter.it is back online.
I was disappointed but not surprised when the service (a non-JavaScript
Twitter feed) was taken down 'for legal reasons' only a few weeks after
I first heard about it, and very surprised when it turned out to be back
up again yesterday!
It clearly isn't rendering on NetSurf entirely the way the site
designers intended - see https://nitter.it/riscos for some really messed
up layout and links that all point to the same tweet from September 2021
when you click on them - but it *is* free of the artificial
must-have-JavaScript ban on the original Twitter site. The browser is
at liberty to download the content and render it as well as it can,
instead of just being blocked outright.
And it works as a plug-in replacement for any Twitter URLs being quoted
on news sites: simply take the original link and edit the 'twitter.com'
URL to read 'nitter.it' in order to find out what was actually said, and
the replies.
e.g. https://t.co/kc4LE2HUWm turns out to translate to
https://nitter.it/inrng/status/1534419583049818115?s=20&t=2ceELTSar4nSRCpFEx-TJg
with a pretty picture.
--
Harriet Bazley == Loyaulte me lie ==
The only rose without thorns is friendship.
_______________________________________________
netsurf-users mailing list -- netsurf-users@netsurf-browser.org
To unsubscribe send an email to netsurf-users-leave@netsurf-browser.org
I was disappointed but not surprised when the service (a non-JavaScript
Twitter feed) was taken down 'for legal reasons' only a few weeks after
I first heard about it, and very surprised when it turned out to be back
up again yesterday!
It clearly isn't rendering on NetSurf entirely the way the site
designers intended - see https://nitter.it/riscos for some really messed
up layout and links that all point to the same tweet from September 2021
when you click on them - but it *is* free of the artificial
must-have-JavaScript ban on the original Twitter site. The browser is
at liberty to download the content and render it as well as it can,
instead of just being blocked outright.
And it works as a plug-in replacement for any Twitter URLs being quoted
on news sites: simply take the original link and edit the 'twitter.com'
URL to read 'nitter.it' in order to find out what was actually said, and
the replies.
e.g. https://t.co/kc4LE2HUWm turns out to translate to
https://nitter.it/inrng/status/1534419583049818115?s=20&t=2ceELTSar4nSRCpFEx-TJg
with a pretty picture.
--
Harriet Bazley == Loyaulte me lie ==
The only rose without thorns is friendship.
_______________________________________________
netsurf-users mailing list -- netsurf-users@netsurf-browser.org
To unsubscribe send an email to netsurf-users-leave@netsurf-browser.org
Sunday, 4 December 2022
Re: New address
On 4 Dec, Frederick Bambrough wrote in message
<mpro.rmcar7003wtw800ir.mlist@ypical.co.uk>:
> In message <5a513affd8cvjazz@waitrose.com>
> Chris Newman <cvjazz@waitrose.com> wrote:
>
> > I ave a new e-address
> >
> > cjazz@npost.uk
> >
> > CanI start using it for this group, please.
>
> I think you'll have to send an email from your new address to
> netsurf-users-join@netsurf-browser.org
It might be easier to use
https://listmaster.pepperfish.net/postorius/lists/netsurf-users.netsurf-browser.org/
as you can unsubscribe your current address at the same time.
(That link is from http://www.netsurf-browser.org/contact/)
--
Steve Fryatt - Leeds, England
http://www.stevefryatt.org.uk/
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<mpro.rmcar7003wtw800ir.mlist@ypical.co.uk>:
> In message <5a513affd8cvjazz@waitrose.com>
> Chris Newman <cvjazz@waitrose.com> wrote:
>
> > I ave a new e-address
> >
> > cjazz@npost.uk
> >
> > CanI start using it for this group, please.
>
> I think you'll have to send an email from your new address to
> netsurf-users-join@netsurf-browser.org
It might be easier to use
https://listmaster.pepperfish.net/postorius/lists/netsurf-users.netsurf-browser.org/
as you can unsubscribe your current address at the same time.
(That link is from http://www.netsurf-browser.org/contact/)
--
Steve Fryatt - Leeds, England
http://www.stevefryatt.org.uk/
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Saturday, 3 December 2022
Re: New address
In message <5a513affd8cvjazz@waitrose.com>
Chris Newman <cvjazz@waitrose.com> wrote:
> I ave a new e-address
>
> cjazz@npost.uk
>
> CanI start using it for this group, please.
I think you'll have to send an email from your new address to
netsurf-users-join@netsurf-browser.org
--
Frederick
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Chris Newman <cvjazz@waitrose.com> wrote:
> I ave a new e-address
>
> cjazz@npost.uk
>
> CanI start using it for this group, please.
I think you'll have to send an email from your new address to
netsurf-users-join@netsurf-browser.org
--
Frederick
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New address
I ave a new e-address
cjazz@npost.uk
CanI start using it for this group, please.
--
Chris
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cjazz@npost.uk
CanI start using it for this group, please.
--
Chris
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